A model for the automatic mapping of tasks to processors in heterogeneous multi-cluster architectures
Material type: ArticlePublication details: ref_localidad@NULL : Universidad Nacional de La Plata. Facultad de Informática, 2007Description: 1 archivo (448 KB)Subject(s): Online resources: Summary: This paper discusses automatic mapping methods for concurrent tasks to processors applying graph analysis for the relation among tasks, in which processing and communicating times are incorporated. Starting by an analysis in which processors are homogeneous and data transmission times do not depend on the processors that are communicating (a typical case in homogeneous clusters), we progress to extend the model to heterogeneous processors having the possibility of different communication levels, applicable to a multi- cluster. Some results obtained with the model and future work lines are presented, particularly, the possibility of obtaining the required optimal number of processors, keeping a constant efficiency level.Item type | Current library | Call number | Status | Date due | Barcode |
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Capítulo de libro | Biblioteca Fac.Informática | A0416 (Browse shelf(Opens below)) | Available | DIF-A0416 |
Formato de archivo: PDF. -- Este documento es producción intelectual de la Facultad de Informática - UNLP (Colección BIPA/Biblioteca)
This paper discusses automatic mapping methods for concurrent tasks to processors applying graph analysis for the relation among tasks, in which processing and communicating times are incorporated. Starting by an analysis in which processors are homogeneous and data transmission times do not depend on the processors that are communicating (a typical case in homogeneous clusters), we progress to extend the model to heterogeneous processors having the possibility of different communication levels, applicable to a multi- cluster. Some results obtained with the model and future work lines are presented, particularly, the possibility of obtaining the required optimal number of processors, keeping a constant efficiency level.
Journal of Computer Science & Technology, 7(1), pp. 39-44
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