Optimization of throughput, fairness and energy efficiency on asymmetric multicore systems via OS scheduling.
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ArticlePublication details: : , 2018Description: 1 archivo (813,8 kB)Subject(s): Online resources: Summary: Most of chip multiprocessors (CMPs) are symmetric, i.e. they are composed of identical cores. These CMPs may consist of complex cores (e.g., Intel Haswell or IBM Power8) or simple and lower-power cores (e.g. ARM Cortex A9 or Intel Xeon Phi). Cores in the former approach have advanced microarchitectural features, such as out-of-order super-scalar pipelines, and they are suitable for running sequential applications which use them efficiently. Cores in the latter approach have a simple microarchitecture and are good for running applications with high thread-level parallelism (TLP).
| Item type | Current library | Call number | Status | Date due | Barcode |
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Biblioteca Fac.Informática | A1184 (Browse shelf(Opens below)) | Available | DIF-A1184 |
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Most of chip multiprocessors (CMPs) are symmetric, i.e. they are composed of identical cores. These CMPs may consist of complex cores (e.g., Intel Haswell or IBM Power8) or simple and lower-power cores (e.g. ARM Cortex A9 or Intel Xeon Phi). Cores in the former approach have advanced microarchitectural features, such as out-of-order super-scalar pipelines, and they are suitable for running sequential applications which use them efficiently. Cores in the latter approach have a simple microarchitecture and are good for running applications with high thread-level parallelism (TLP).
Journal of Computer Science & Technology, 18(1), pp. 71-72.
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