000 01239nam a2200253 a 4500
003 AR-LpUFIB
005 20240131183150.0
007 ta
008 230201s2019 xxua dr 000 0 eng d
024 8 _aDIF007963
040 _aAR-LpUFIB
_bspa
_cAR-LpUFIB
100 1 _aHennessy, John L.
_9258966
245 1 0 _aComputer architecture :
_ba quantitative approach
250 _a3rd ed.
260 _aCambridge :
_b Morgan Kaufmann,
_cc2019
300 _a v.
500 _aIncluye ejercicios, referencias bibliográficas e índice. --
505 0 _a 1. Fundamentals of Quantitative Design and Analysis -- 2. Memory Hierarchy Design -- 3. Instruction-Level Parallelism and Its Exploitation -- 4. Data-Level Parallelism in Vector, SIMD, and GPU Architectures -- 5. Multiprocessors and Thread-Level Parallelism -- 6. The Warehouse-Scale Computer -- 7. Domain Specific Architectures -- Appendix A. Instruction Set Principles -- Appendix B. Review of Memory Hierarchy -- Appendix C. Pipelining: Basic and Intermediate Concepts -- References -- Index
650 4 _aARQUITECTURA DE COMPUTADORAS
_9247842
700 1 _aGoldberg, David E.
_9251765
700 1 _aPatterson, David A.
_9253410
700 1 _aAsanovic, Krste
_9258967
942 _cBK
999 _c849963
_d849963